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Advanced Packaging Technology Solution from Dishan Technology: Leading Innovation in the Post Moore Era of Semiconductors

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  • Advanced Packaging Technology Solution from Dishan Technology: Leading Innovation in the Post Moore Era of Semiconductors

Overview

As Moore's Law gradually approaches its physical limits, the semiconductor industry is shifting from a "process scaling"-driven model to a "system integration"-driven one. The traditional approach of boosting performance by shrinking transistor sizes is facing enormous challenges, while advanced packaging technologies, with their groundbreaking integration capabilities, have emerged as a critical path to sustain the improvement of chip performance. Against this backdrop, Dishan Technology, a leading domestic provider of semiconductor packaging solutions, has dedicated over a decade to the field of advanced packaging. With innovative technologies as its cornerstone and customer needs as its guiding principle, the company is committed to delivering high-reliability, high-integration, and cost-effective packaging technologies and services to global clients. From artificial intelligence and high-performance computing to automotive electronics and 5G communications, Dishan Technology leverages advanced packaging technologies as a bridge to help customers achieve breakthroughs in numerous cutting-edge fields, driving the semiconductor industry toward a new era of "More than Moore".

 

Focused on Advanced Packaging and Building Core Technology Barriers

The company boasts a top-tier R&D team of over 130 engineers, including seasoned experts from internationally renowned semiconductor enterprises. It possesses full-chain capabilities spanning packaging design, material selection, process development, and mass production delivery, and has established a complete independent intellectual property system with a cumulative total of more than [specific number] patent applications. Having obtained ISO 9001, IATF 16949, and other international quality system certifications, the company operates a Class 1000 cleanroom compliant with international standards, equipped with world-leading production lines for Wafer Level Packaging (WLP), System-in-Package (SiP), 2.5D/3D packaging, etc., with an annual production capacity of [specific number] 10,000 wafers. Relying on its robust technical strength and stable delivery capability, Dishan Technology has become a core supplier to multiple Fortune Global 500 companies, accumulating extensive mass production experience in smart terminals, data centers, new energy vehicles, and other sectors.

 

Core Technologies and Solutions

Centering on the four core objectives of "high density, high bandwidth, low latency, and miniaturization", Dishan Technology has built a comprehensive advanced packaging technology platform covering a variety of cutting-edge solutions:

1.  Wafer Level Packaging (WLP)

    Technical Features: The packaging process is completed at the wafer level, and Chip Scale Packaging (CSP) is achieved through Redistribution Layer (RDL) and bump technologies. Compared with traditional packaging, the package volume is reduced by more than 4%, parasitic capacitance and resistance are significantly lowered, and signal transmission speed is increased by 3.7%.

    Application Fields: Widely used in mobile terminal sensors (e.g., accelerometers, gyroscopes), RF Front-End Modules, and Power Management Integrated Circuits (PMIC), helping devices achieve thinness, lightness, and high performance.

    Advantages: Adopts batch production mode with high yield and low cost, making it particularly suitable for large-scale applications in the consumer electronics field.

2.  System-in-Package (SiP)

    Technical Features: Integrates chips with different functions (e.g., logic chips, memory chips, RF chips) and passive components (resistors, capacitors, inductors) into a single package, realizing system-level functional integration through high-density wiring. It supports multiple package forms, including Package-on-Package SiP (PoP SiP) and embedded SiP (eSiP).

    Application Fields: In space-constrained scenarios such as smart watches, TWS earphones, IoT terminals, and medical wearable devices, SiP technology can significantly reduce PCB area and improve system energy efficiency ratio.

    Advantages: Shortens product development cycle by [specific percentage]%, reduces total system cost by [specific percentage]%, and optimizes heat dissipation and electromagnetic compatibility through integrated design.

3.  2.5D Packaging (Interposer-based Integration)

    Technical Features: Uses a silicon interposer as a bridge to connect multiple chips through micro-bumps (μm-level Bumps), enabling high-density interconnection. The interposer can integrate Through-Silicon Via (TSV) technology, supporting over 10,000 I/O interfaces with a data transmission bandwidth exceeding [specific number] GB/s.

    Application Fields: In scenarios such as AI training servers, high-performance GPU accelerator cards, and network switches, 2.5D packaging effectively addresses the bandwidth bottleneck of multi-chip parallel communication through its unique structural design. For example, in AI training servers, 2.5D packaging can integrate multiple chips into one package. By shortening the communication distance between chips, it increases data transmission speed, thus breaking through the bandwidth limitations of traditional packaging methods. Studies show that the communication bandwidth of AI servers using 2.5D packaging can be increased by more than 30% compared with traditional methods, greatly improving the overall performance of the servers.

    Advantages: Supports heterogeneous integration of logic chips and High-Bandwidth Memory (HBM), reducing power consumption by [specific percentage]% and improving performance by [specific percentage]%, making it a core technology for data center-level applications.

4.  3D Packaging (3D IC Integration)

    Technical Features: Achieves vertical stacking of chips through TSV technology, reducing the inter-layer interconnection distance to the [specific number] μm level and increasing interconnection density by more than [specific number] times. Combined with hybrid bonding technology, it enables direct bonding of chips with different process nodes, breaking through the limitations of traditional packaging.

    Application Fields: In computing-intensive applications such as HBM3 memory, 3D NAND flash memory, and compute-in-memory chips, 3D packaging promotes deep integration of storage and computing units, breaking through the "memory wall" bottleneck.

    Advantages: Improves computing power per unit volume by [specific percentage]% and optimizes energy efficiency ratio by [specific percentage]%, providing critical support for scenarios such as AI large model training and edge computing.

5.  Fan-Out WLP

    Technical Features: Eliminates the need for traditional packaging substrates, realizing fan-out of I/O ports through wafer-level reconstruction process, with package size reduced by [specific percentage]% compared with traditional packaging. It supports Fan-Out Multi-Chip Package (FO-MCP), further integrating passive components to enhance overall performance.

    Application Fields: In high-frequency applications such as 5G millimeter-wave modules, automotive millimeter-wave radars, and RF transceivers, Fan-Out technology has become the mainstream choice due to its low parasitic parameters and excellent heat dissipation performance.

    Advantages: Suitable for high-frequency signal transmission, reducing insertion loss by [specific number] dB, while achieving a thinner package thickness (< [specific number] mm) that meets the automotive-grade AEC-Q100 reliability standard.

 

Technological Innovation and R&D Directions

Dishan Technology continuously increases R&D investment, with annual R&D expenditure accounting for more than [specific percentage]% of its revenue, focusing on breakthroughs in the following directions:

Heterogeneous Integration Technology: Develops a chip-photonics integration platform based on covalent bonding to achieve efficient conversion of optoelectronic signals; explores hybrid stacking of logic chips and memory devices (e.g., MRAM, ReRAM) to break through the bandwidth limitations of traditional memory.

New Material Application: Collaborates with universities to develop low-dielectric-constant (k<2.0) polymer materials, reducing signal transmission loss; develops high thermal conductivity interface materials (thermal conductivity > [specific number] W/m·K) to solve the heat dissipation challenges of 3D packaging.

Advanced Interconnection Technology: Promotes the mass production of Copper-Copper (Cu-Cu) Hybrid Bonding technology, with bonding pitch breaking through [specific number] μm; overcomes the ultra-fine pitch bump (< [specific number] μm) process to support higher-density packaging.

Automotive-Grade Packaging: Establishes packaging processes compliant with the ISO 26262 functional safety standard; develops high-reliability packaging solutions with high temperature resistance (> [specific number] °C) and vibration resistance to accelerate the localization process of chips for autonomous driving and new energy vehicles.

AI-empowered Packaging Design: Builds an AI-based packaging design simulation platform, optimizes packaging structures through machine learning, shortening the design cycle by 3% and improving yield by 11%.

 

Quality and Reliability Assurance

The company has established a full-process quality control system to ensure that products meet the requirements of harsh application scenarios:

Simulation Analysis: Uses tools such as ANSYS and SolidWorks to conduct mechanical simulation and thermal simulation analysis of packaging structures, identifying potential risks in advance.

Reliability Testing: Equipped with equipment for Temperature Humidity Bias (THB) testing, temperature cycle testing ([specific number] °C ~ [specific number] °C), Highly Accelerated Stress Test (HAST), etc., and strictly implements standard tests such as AEC-Q100 and JEDEC.

Failure Analysis Laboratory: Possesses advanced analysis equipment such as Scanning Electron Microscope (SEM), Focused Ion Beam (FIB), and Energy Dispersive X-ray Spectroscopy (EDX) to quickly locate the root cause of failures and continuously improve processes.

Supply Chain Management: Establishes a material traceability system, with core raw materials all passing strict certification to ensure batch consistency.

Environmental Compliance: All products comply with environmental regulations such as RoHS, REACH, and halogen-free standards, promoting green manufacturing.

 

Customer Value and Service System

Upholding the service philosophy of "technology-driven, customer-centric", Dishan Technology provides comprehensive support:

Customized Design: Offers one-stop solutions such as packaging architecture design, thermal simulation, and signal integrity simulation according to customer needs.

Rapid Prototyping: Relying on the rapid prototyping platform, realizes engineering sample delivery within [specific number] weeks.

Joint Design and Manufacturing (JDM): Establishes joint teams with customers to collaborate throughout the entire process from product definition to mass production, accelerating the implementation of innovations.

Flexible Manufacturing: Flexibly allocates production capacity to support seamless switching from small-batch trial production to large-scale mass production.

Technical Support Network: Sets up technical support centers in major global markets, providing 24/7 online services and on-site support.

Customer Case: Developed a 2.5D packaging solution for a leading international AI chip company, integrating GPU and HBM into a single package, which increased AI inference performance by 16% and reduced power consumption by 22%, helping its data centers save energy and reduce costs.

 

Future Outlook: Building a Semiconductor Packaging Ecosystem Together

Facing the wave of transformation in the global semiconductor industry, Dishan Technology has proposed the "Packaging +" strategy to deepen industrial collaboration: promote technological innovation by establishing joint laboratories; achieve resource sharing through cooperation with upstream and downstream enterprises in the industrial chain; set phased goals to improve packaging process capabilities, striving to increase product performance by 20% within three years. These measures will help Dishan Technology build a sound semiconductor packaging ecosystem.

Technical Collaboration: Establishes joint laboratories with fabless semiconductor companies and foundries to promote the implementation of Chiplet technology standards.

Ecosystem Construction: Invests in the construction of an advanced packaging innovation center to provide pilot-scale platforms and technology incubation services for startups, accelerating the commercialization of technologies.

Industry-University-Research Integration: Focuses on research in cutting-edge fields such as basic materials and advanced processes.

Global Layout: Sets up R&D centers in Europe and North America to integrate international technical resources and enhance global competitiveness.

Sustainable Development: Promotes green packaging processes, develops recyclable packaging materials, and reduces carbon emissions in the manufacturing process.

 

At the critical juncture when the semiconductor industry is moving toward the "post-Moore era", advanced packaging technologies are reshaping the future of chip design and system integration. With continuous innovation as its driving force, customer needs as its guide, and ecological cooperation as its link, Dishan Technology will continuously break through the boundaries of packaging technologies, create value for customers, contribute to the independent controllability and high-quality development of China's semiconductor industrial chain, and jointly write a new chapter of "Packaging the Future, Integrating Infinity".